[HARDWARE] Massive computing power
j-zbiciak1 at ti.com
Sun Sep 27 01:51:11 EDT 1998
'Troy Thoele' said previously:
| Check out Digital Signal processors. These CPU's are self contained,
| cheap, and easy to run in multiples. Right now I'm working with Analog
| Devices SHARC processors, and this thing does 120MFLOPS at 40Mhz. TI
| makes a chip that approaches a GFLOP on a single chip.
Bear in mind that FLOPs isn't as important as integer performance. An
integer DSP (such as a TI's TMS320C8x or TMS320C62x) would be better suited
to the job.
Awhile back, I did some minor benchmarking of the C62x on RC5 cracking,
and I was moderately impressed. However, I don't think I can really
post any benchmark results, since I'm a TIer. :-)
I will say that the C8x's Parallel Processor has almost the exact
hardware you'd need to perform half of an RC5 round in one cycle, if I
recall correctly. With multiple Parallel Processors (four on a 'C80,
two on a 'C82) and one RISC processor on one die, you should be able to
chow through keys like they were nothing.
| I can't get the RC5 core code ported to this chip yet because the
| creators (in thier infinite wisdom???) chose C++ rather than ANSI C for
| the core routines. That's where I'm stuck at.
What you could do is port _just_ the cracking core to the DSP. Run the
rest of the client on a "host" machine. That way, the DSP looks like a
function call to the "host" machine. All of the C++ could live on your
PC, then, and only the assembly language core and some wrapper code which
communicates with the PC would be required.
After all, unless you have TCP/IP and a hard-drive hooked to your DSP,
you'll need some external machine to handle this stuff for you anyway. :-)
+------ Joseph Zbiciak -----+
| - - j-zbiciak1 at ti.com - - | "The meaning of a value is determined
|-Texas Instruments, Dallas-| by how it is used."
| - #include <disclaim.h> - | -- Ousterhout
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