[HARDWARE] Just Courious......

Jerome Lamarque globulle at club-internet.fr
Mon Oct 11 05:56:18 EDT 1999


À (At) 19:10 -0400 15/09/1999, Jameel Akari écrivait (wrote) :
>On Wed, 15 Sep 1999, Marcus Gillette wrote:
>
> > Actually, as I understood it, from the rc5 FAQ, RISC architecture isn't as
> > good at working on rc5.  The reason is becuase CISC processors have the
> > instruction set the rc5 client uses, whereas the RISC processor would have
> > to emulate that instruction set.  I don't know, but maybe I'm wrong.

Wrong but in part only.

>	Yes, in a way.
>
>	The _architecture_ doesn't matter- but RISC means *reduced*
>instruction set.  Which means that to speed up the most common
>instructions, you get rid of the least common ones.  The x86 CISC has the
>rotate-left instruction built in, as well as some variants of rotate.
>Thing is, ROL just isn't used that much, so cpus like the DEC Alpha, IBM
>POWER/P2SC, MIPS and maybe some others leave it out.  So the compiler has
>to fake ROL by shift-left and some tricks.
>
>	I *think* PowerPC has ROL built in or at least a fairly quick
>"macro" implementation, so it compares better to x86 for RC5.

I can assure you *every* PowerPC *has* the ROL instruction built in.

All PowerPC processors are RISC based processors and are faster at 
rc5 than equivalent Pentium processors without MMX instruction set. 
Pentiums running the MMX optimised version of the client are faster 
than equivalent PowerPCs.

As of today on PowerPC 603, 604, 750(G3) and 7400 (G4) series 1MHz= 1block/day.

The fact is most RISC processors (MIPS in Silicon Graphics stations, 
SPARC in SUN stations, DEC Alpha and other "minicomputers") lack the 
"rotate-left" instruction which is used massively by rc5. The 
processor has to emulate the instruction which takes a lot of cycles 
(up to 8).

In Pentiums, K5 and all PowerPCs the rotate left instruction is hard 
coded, not in the K6 which makes it slower at rc5 than K5.

The PowerPC 601, which has the ROL built in, is derived from IBM's 
POWER architecture, therefore I *think* POWER processors have it 
also. But the 601 has POWER instruction set which other PowerPC 
processors don't have anymore.

We're still waiting for a client taking advantage of the PowerPC 
7400's Velocity Engine (aka AltiVec).

And Mac OS 9 is in the starting blocks. (Hi coders ;-)

-- 
Jerome "globule" Lamarque	French TidBITS translators team member
"In life there are three kinds of people.
Those who can count... and the others."<mailto:globulle at club-internet.fr>
Text composed on a Macintosh on 80 columns
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