jakari at fribble.cie.rpi.edu
Wed Sep 29 16:51:31 EDT 1999
On Wed, 29 Sep 1999, Jim C. Nasby wrote:
> Actually, a 64 bit CPU might help since you could theoretically check two keys
> at once.
Add: a 64-bit CPU with a built-in ROL instruction. I've got three
Alphas doing RC5-64: one 21064 (dual issue) and two 21164 (which is
quad-issue iirc!) and between them they don't add up to a single PIII-500
in terms of keyrate. Grrr...
> On Wed, Sep 29, 1999 at 05:34:31PM +0200, Jesper Monsted wrote:
> > > > Doesn't RC5 require a 32-bit processor anyway?
The d.net clients have that as a requirement, but no, it's not
needed in general.
> > Actually, i don't think a 64bit would help, since the algorithm works on
> > 32-bit-nibbles... maybe if you can do SIMD on the 64-bit?
Yep, vector processing is cool, and it only took Intel 10 years or
so to borrow the idea from the VAX and Cray (and others) Speaking of
insane power dissipation, I've got a couple tubes of M68000's I'd love to
try running in parallel to get a pseudo-SIMD rig. Yeah, like I have time
to make that work worth a damn.
Insert witty comment here
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