[HARDWARE] power and feature size

John L. Bass jbass at dmsd.com
Wed Mar 13 14:16:39 EST 2002


	Not true, If they are done 'tomorrow' then there will be a saving on
	electricity because the more powerful computer of tomorrow will crunch much
	faster than todays.  And possibly with miniaturisation at a lower power
	consumption to boot.

For those that have not been following VLSI for the last couple decades, a few pointers
to explain the last reply on this topic. For the "work" in a system (aka sum of e=mv2
over time) to remain constant as the cycle rate increases, the feature size and potential
(the mv2 portion) have to decrease. Both the feature size and operating voltage are
reaching physical limits, reducing the mv2 portion to a constant per signal transition.
The power in VLSI at this point becomes the product of total gate transitions per unit time
and the energy required per transistion. Increasing gate count and frequency increases
power proportionately.

Most of the power reductions of late have been reducing the gate potential (V squared)
part of the equation - but that is bounded by the bond potential required to move the
electrons. Feature size (mass) has been falling even more slowly of late, as we hit the
minimum number of electrons that can be sensed by the control gate in the transistor switch,
or reliably transfered in a "wire" on the die without getting lost. The purity of the
gates and wires to  prevent electron loss is a critical process variable, as is the
purity of all the materials to avoid natural ionizing radiation (like alpha particles)
which are capable of altering the charge in a gate or wire.

As a result, to gain speed has also required increasing parallelism (more gates). But
it doesn't really matter, as both clock rate increases and parallelism linearly increase
total power. Power density and cooling continue to be natural limits.

The solutions are to find new control structures that avoid the bond potential limit
or feature size mass limits. Optical gates, and quantum (single or several molecule)
gates, are two primary approaches to avoid the current physical limits. There are also
manufacturing process limits, which affect yields and maximum die size, and ultimately
the ability to fabricate these devices in volume. We are seeing some of thing come out
of labs as research reports - maybe in a decade or two it will be reduced to consumer
product levels.

John
--
To unsubscribe, send 'unsubscribe hardware' to majordomo at lists.distributed.net



More information about the Hardware mailing list