[Hardware] Fully unrolled RC5 on FPGA

[Frédéric Bastien]

To my knowledge Folding at home try to use graphic card and not FPGA. 
This could be interesting as this don't require new hardware. But we 
will need people that have time to implement it.

Frédéric Bastien

Olivier Meyer wrote:
> If we will use a microcontroller to control the FPGA, an AVR would be 
> much better than a PIC for many reasons:
> *more register space
> *a GCC port
> *higher speed.
> 
> Notice that we got to the FPGA before Folding at Home!
> 
> On 11/15/06, *gmeurice at dice.ucl.ac.be <mailto:gmeurice at dice.ucl.ac.be>* 
> <gmeurice at dice.ucl.ac.be <mailto:gmeurice at dice.ucl.ac.be>> wrote:
> 
>     Bonjour,
> 
>     Tuesday, November 14, 2006, 8:41:25 PM, you wrote:
> 
>     JLB> Hi Guerric,
> 
>     JLB> Any chance I can get you go target your design to an
>     XCV2000E-6BG560C
>     JLB> and tell me if it fits and what the clock rate estimate is?
> 
>     JLB> It's just a data point for me to compare two year old data to
>     the XCV4LX
>     JLB> numbers.
> 
>     JLB> Thanks,
>     JLB> John
> 
>     Ok, I can do that.
>     The design will need 4 times the number of bRAMs compared with the
>     Virtex4 design: 16-bit data width and no "read before write" mode.
> 
>     With this kind of RAMs, a register on the B signal of the KeySchedule
>     bloc could be saved using the fact that input is mirrored to the
>     output of the bRAM while writing. I currently don't plan to make this
>     optimization. (this would mean a saving of 26*3 *32/2 = 1250 Slices).
>     Whatever, it is probably bad from a place&route point of view.
> 
>     I will test the full design with the new long shift register and will
>     provides the implementation results.
> 
>     --
>     Guerric
> 
> 
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> 
> 
> -- 
> -----------------------
> Olivier V. Meyer
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