[Hardware] Fully unrolled RC5 on FPGA

[Olivier Meyer]

Folding at home is trying to use graphic cards, but there is one reason why
FPGA is much better:
A graphics card is NOT DESIGNED to execute general purpose code. It is made
to render video and 3D images. What Folding has done is they have managed to
use the restricted instruction set to do their protein-folding stuff. An
FPGA design is the one thing less customisable than an ASIC. We can choose
whatever we want to put on the FPGA, and we can make it check 1 key/cycle. I
wonder, can our FPGA implementation be used on cheap, low power FPGAs that a
student can afford (hint, hint!).

Has anyone tried to use 74HC discrete logic to make an RC5-72 core?


On 11/15/06, Frédéric Bastien <nouiz at nouiz.org> wrote:
>
> To my knowledge Folding at home try to use graphic card and not FPGA.
> This could be interesting as this don't require new hardware. But we
> will need people that have time to implement it.
>
> Frédéric Bastien
>
> Olivier Meyer wrote:
> > If we will use a microcontroller to control the FPGA, an AVR would be
> > much better than a PIC for many reasons:
> > *more register space
> > *a GCC port
> > *higher speed.
> >
> > Notice that we got to the FPGA before Folding at Home!
> >
> > On 11/15/06, *gmeurice at dice.ucl.ac.be <mailto:gmeurice at dice.ucl.ac.be>*
> > <gmeurice at dice.ucl.ac.be <mailto:gmeurice at dice.ucl.ac.be>> wrote:
> >
> >     Bonjour,
> >
> >     Tuesday, November 14, 2006, 8:41:25 PM, you wrote:
> >
> >     JLB> Hi Guerric,
> >
> >     JLB> Any chance I can get you go target your design to an
> >     XCV2000E-6BG560C
> >     JLB> and tell me if it fits and what the clock rate estimate is?
> >
> >     JLB> It's just a data point for me to compare two year old data to
> >     the XCV4LX
> >     JLB> numbers.
> >
> >     JLB> Thanks,
> >     JLB> John
> >
> >     Ok, I can do that.
> >     The design will need 4 times the number of bRAMs compared with the
> >     Virtex4 design: 16-bit data width and no "read before write" mode.
> >
> >     With this kind of RAMs, a register on the B signal of the
> KeySchedule
> >     bloc could be saved using the fact that input is mirrored to the
> >     output of the bRAM while writing. I currently don't plan to make
> this
> >     optimization. (this would mean a saving of 26*3 *32/2 = 1250
> Slices).
> >     Whatever, it is probably bad from a place&route point of view.
> >
> >     I will test the full design with the new long shift register and
> will
> >     provides the implementation results.
> >
> >     --
> >     Guerric
> >
> >
> >     _______________________________________________
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> >
> >
> >
> >
> > --
> > -----------------------
> > Olivier V. Meyer
> > Congress shall make no law respecting an establishment of religion, or
> > prohibiting the free exercise thereof; or abridging the freedom of
> > speech, or of the press; or the right of the people peaceably to
> > assemble, and to petition the government for a redress of grievances.
> >
> >
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-- 
-----------------------
Olivier V. Meyer
Congress shall make no law respecting an establishment of religion, or
prohibiting the free exercise thereof; or abridging the freedom of speech,
or of the press; or the right of the people peaceably to assemble, and to
petition the government for a redress of grievances.
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