[Hardware] "success"

[gmeurice at dice.ucl.ac.be]

Hello,

Saturday, October 21, 2006, 8:51:24 AM, you wrote:

JLB> However, it could be cheaper for a fully looped design, just as it is for
JLB> small prcoessors. And might be useful in running many small looped engines
JLB> in the FPGA, rather than one large unrolled engine.

If there is no room for a fully unrolled engine, the best is of course
small looped engines.
But "not too small" looped engine! I'm sure the area-time product is
better using inner pipelining in the looped engine (so while
processing several keys at the same time in the same engine).
Another point is how you feed the engines. A big bus, connected to
many small looped engine, cause extra delays and constraint the whole
operating frequency (but it should be okay for rather small FPGAs).

-- 
Guerric