[rc5] Re: Supercomputers & Bovine, Q&A

Carsten Jacobi carsten at jakes.kawo1.rwth-aachen.de
Wed Aug 6 03:02:44 EDT 1997


On 05-Aug-97 Marc Sissom wrote:
>At 08:57 AM 8/5/97 -0700, you wrote:

>>Nope. PPC chips are pure RISC. Always have been. 
>
>Ha! Now things get interesting. Define pure RISC.
>
>[snip]
>Is it large register arrays?
> yep, relatively large anyway.

Acceptabel, if you compare for example with AMD29K ...

>Or is it just a Reduced instruction set? Reduced relative to what?

Indeed, you won't find "the risc"-cpu or "the cisc"-cpu. There are only features
that are typically for risc or for cisc. Though I would call the PowerPC more
a risc-like chip, because:

a) The machine-instructions have a constant length of four bytes
b) The first six bits of each instruction indicate the opcode -> the PowerPC
-architecture can have "only" 64 commands
c) The PPC is a three-address-machine (hmm, ok, this is not a typical risc-
feature ... cisc-chips could have this too -> VAX)
d) There is no stack defined by the PowerPC, the OS is responsible for stack-
management
e) Exceptions are not entered by a jump-vector but by solid set addresses
f) Standard-instructions that are found on every other instruction set are mis-
sing in the PowerPC-architecture and must be "emulated" by different instruc-
tions ( move register1 to register2 -> add 0+register1 and write to register2
        load immediate to register -> add 0+immediate and write to register
        shift left -> rotate left and mask the bits out that rotated in
        rotate right x -> rotate left (wordlength in bits)-x
                                .
                                .
                                .
      )
.
.
.

>The Alpha instruction set is even more reduced than the PPC. Is it
>a "purer" RISC?

I would say, yes! If there are "riscy" and "ciscy" attributes for a cpu one cpu
can be "more risc" or "more cisc" than the other; my opinion ...

Carsten
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