[rc5] Risc speedup?

Ralf Helbing helbing at isgnw.cs.Uni-Magdeburg.DE
Fri Jul 18 14:37:30 EDT 1997


> I'm interested in how it performs compared to 2.002. Could you send
> me :

> 	- CPU type (Ultra | Super)
> 	- frequency of the chip
> 	- speed of 2.002
> 	- speed of this modified v1 client

These are SGIs

The v1 numbers are based on CPU time (I added a line of code or two).
The 2.002 numbers are wall clock time.  BTW: The -benchmark option
takes waaaaay too long.  Can this be changed for 2.003?  Maybe you
give us the -m option back so that you keep the ultra-long -benchmark
option for compatibility?

Chip/Speed	2.002		v1
---------------------------------------
150 MHz R4400	84404		82747
133 MHz R4600	109710		102616
180 MHz R5K	148054		140056
180 MHz R10K	214847		281293
195 MHz R10K/4	235972		303951
195 MHz R10K/1	237333		305343

So the speedup is only for R10Ks which have 32 shadow registers,
register renaming and more pipelines.  I believe the same applies for
the Ultra sparcs since I haven't seen much of a speedup for Super
sparcs and lesser CPUs.

Ralf
-- 
"Ever get pieces of flesh caught in your teeth?  I *hate* that!"

Ralf Helbing,    University of Magdeburg,     Department of Computer Science
39106 Magdeburg, UniPlatz 2                         Phone: +49 0391 67-12189
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