[rc5] Client optimizations

Marc Sissom msissom at dnaent.com
Tue Jul 29 15:11:43 EDT 1997


At 11:58 AM 7/29/97 -0700, you wrote:
>Murray Stokely wrote:
>
>> % Is this correct?  Is anyone considering 6x86MX and K6 optimizations?

No one has(yet) discovered any rc5/MMX optimizations that are worthwhile.

>> % It seems like the K6's are really slow for their clock speed.  Can
>> % anyone confirm whether or not they have a rotate instruction?  It
>> has
>> % been speculated that they might not, but no one was able to
>> % confirm/deny this with authority.  Just curious, especially about
>> the
>> % 6x86MX optimization.  Besides better branch prediction and a larger
>> % (64k) L1 cache, is it that much different from the 6x86?.

No.

>> Of course they have a rotate instruction.  it is an x86 chip, therefor
>> it can execute all the x86 instructions.

Indeed, so is my x86 simulator that I use for debugging, and it can
execute the x86 instructions; but it does not have a native,
multi-bit-variable-on-register-rotate implemented in hardware, and
so it does it slowly.

>But it is certainly possable that the decoder could accept the
>instruction only to convert it into a series of other "native"
>instructions.

Which is, of course, what it does.

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