[RC5] Hardware Algorithm
jim.mcmanus at xilinx.com
Mon Nov 17 10:13:41 EST 1997
Parden me if this has already been discussed, but has
anyone though about reducing the cracking algorithm
to a hardware design and putting it in an FPGA? I suspect
it could be made to run many times the speed of any
Can anyone point me to a source for the code cracking algorithm?
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