[RC5] Hardware Algorithm

lunaslide lunaslyd at pacbell.net
Mon Nov 17 10:46:41 EST 1997


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At 10:13 AM 11/17/97 -0800, you wrote:
>Parden me if this has already been discussed, but has
>anyone though about reducing the cracking algorithm
>to a hardware design and putting it in an FPGA? I suspect
>it could be made to run many times the speed of any
>processor.
>
>
>Can anyone point me to a source for the code cracking algorithm?

Look at the mailing list archives for a few weeks ago.  There was a 
lot of discussion about an FPGA solution.  There's even some pages:

>other stuff I know about them:  Xilinx (http://www.xilinx.com) makes 
good
>FPGA chips.  2 FPGA related sites are http://www.plnv.com/ and
>http://techweb.cmp.com/edtn/index.html, and the "RC5 on FPGAs" web 
page,
>by our good friend Barrel is at
>http://www-inst.eecs.berkeley.edu/~barrel/rc5.html
>
>the http://www.associatedpro.com/aps page also had a tutorial on
>programing FPGAs, which might be very useful.



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