[RC5] K6-2/350 vs PII 266 mobile performance - oops!

Marc Sissom marcus at teleteam.net
Mon Dec 28 17:01:15 EST 1998

Marc Sissom wrote:
> Either
> the multi-bit ROTate is microcoded(native instruction
> is supported but takes more than a single cycle) or it
> must be emulated in the software by multiple SHIFTs to
> the left and right and then the results of those shifts
> are merged with an AND. 
Sorry, I should have said:

  ...are masked with ANDs and merged with an OR.

So there is a minimum 5 instruction penalty for procs
that don't support a native arbitrary rotate, 2 SHIFTs,
2 ANDs and an OR. Sometimes a multi-bit shift is not
supported in a single cycle so the cost is even greater...

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