[RC5] Strange Keyrates

Colin L. Hildinger colin at ionet.net
Sun Jun 14 23:40:27 EDT 1998


M2 has MMX instructions and 64k of L1 cache.  My M2 at 225MHz does
about 526kk/s.

On Mon, 15 Jun 1998 03:45:09 +0200, Remi Guyomarch wrote:

>John Campbell wrote:
>> 
>> On Sun, 14 Jun 1998, Colin L. Hildinger wrote:
>> 
>> > I think you're quoting a 6x86MX (M2) PR200
>> >
>>         My 6x86-200+ (underclocked at 133MHz... my motherboard doesn't
>> support the 75MHz bus) gets just over 300kk/s with X and the usual mess of
>> daemons running, so 350kk/s doesn't sound too out of line for a 200+ clocked
>> at the normal 150MHz. Also, if I'm not mistaken, the M2 is Cyrix's
>> equivalent of the MMX, which doesn't affect the RC5 algorithm at all, so
>> there shouldn't be any significant keyrate difference between the 200+ and
>> the M2 200+.
>
>I don't recall the difference between a non-MX Cyrix and an MX one, but
>there may be more than just MMX instructions. For example they could
>have added more L1 cache (like Intel did when they released the P5-MMX)
>which will improve keyrate on used systems.


Colin L. Hildinger
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