[RC5] Why is CSC bitslice MMX only?

Bruce Ford b.ford at qut.edu.au
Fri Dec 17 10:28:48 EST 1999


>I haven't seen this question asked yet, so I'll be the one.  Why is the CSC
>bitslicing core limited to x86 MMX processors?  If I remember correctly from
>the DES days, the concept of bitslicing doesn't use any types of operations
>that are unique to the MMX instruction set, so that can't be why.  Does it
>have something to do with register size?  I remember someone saying that we
>can't bitslice RC5 because it would require significantly wider registers
>than current processors have.  Inquiring minds want to know...

Short answer is that it is not limited to MMX.

The original core (indeed all d.net cores for CSC) are bitslice.  The
reason the MMX core is twice as fast is that it processes 64 keys per
instruction vs 32 for the ALU core.

Now the DES core is a different matter.  It is bitslice on PPC, Alpha,
SPARC, MIPS and x86 MMX processors.  It uses a more conventional method on
non MMX x86.  It could use bitslice with the ALU registers but my initial
calculations indicated that this was unlikely to be significantly faster
than the BrydDES method which was used.

Bitslicing RC5 is difficult because of the additions and variable
rotations.  These take enough "gates" to require registers 192 bits wide
before it is faster than current x86 cores.  

>
>Greg Orman
>A man's best friends:  a Harley, a Beretta and a Gund.


Bruce Ford                                      b.ford at qut.edu.au
Projects Coordinator
Teaching and Learning Support Services          Ph: +61 7 3864 1178
Queensland University of Technology

--
To unsubscribe, send 'unsubscribe rc5' to majordomo at lists.distributed.net
rc5-digest subscribers replace rc5 with rc5-digest



More information about the rc5 mailing list