[RC5] clocks / key differences

Eno Jon enojon at delphi.com
Wed Nov 17 21:23:45 EST 1999


Mikus Grinbergs wrote:

> I completely agree that the AMD K6 has poorer RC5 processing than
> Intel, but RC5 makes heavy use of the x86 'rotate' instruction
> which IMHO is not 'typical' in "integer arithmetic" calculations.
> (The K6 *does* have poor performance executing the x86 'rotate'.)
>

I'm only judging by the number of parallel integer processing units.

>
> >
> > The K6-III has onboard
> > L1 of 64k, L2 of 128k and depending on your motherboard a bus
> > speed of 100mhz.   Of course, most 200MHz MMX's run on slower
> > bus speed motherboards, but if you have equivalent 100mhz bus
> > and 512k L2 [or more on newer mainboards] the Intel chip would
> > show more efficient processing because it would lack the memory
> > latencies the AMD chip receives because it has a reduced cache
> > size.
>
> That last sentence above seems to imply that the K6-III has LESS
> cache than the MMX.  But if an ordinary motherboard supplies 512k
> (or more) of cache to the MMX, an ordinary motherboard would ALSO
> supply 512k (or more) of cache to the K6-III.
>

L3 level cache.  The k6-3 L2 would be unchanged.  To increase
performance L3 must be many times larger than L2.

>
> The K6-III has ADDITIONAL cache that the MMX does not have.  Its
> L1 cache is bigger than the L1 cache of the MMX.  And the K6-III
> has an extra 128k cache layer between the CPU and the motherboard.
> That layer does not _replace_ the cache on the motherboard.  It
> _adds_ function by taking care of some requests that otherwise
> would have had to be handled by the cache on the motherboard.
>
> [Do not be confused if the cache on the motherboard is called an
>  L3 cache with the K6-III.  It is still a cache, and still works
>  exactly the same way as the cache on the motherboard for the MMX.
>  (Maybe the extra 128k cache onboard the K6-III should have been
>  called L1+ cache - then what was being called an L2 cache on the
>  motherboard would not have had its name changed when used with
>  the K6-III). ]
>
> mikus

The cache onboard the K6 is still L2 just like the cache onboard
a Celeron or Xeon is "L2".    It's considered outside the main
processor unit.  The difference is that the L2 responds at the same
freq as your processor while the mainboard's L2 operates at
bus speed 66mhz - 100mhz range.   It's still called L2 because
it is supplementary to the onboard registers called L1.



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