[RC5] VIA C3

Peter Cordes peter at llama.nslug.ns.ca
Wed Aug 29 21:23:27 EDT 2001


On Wed, Aug 29, 2001 at 01:02:53AM +0800, Jin-Wei Tioh wrote:
> Would the lack of out-of-order execution on the VIA C3 processor
> significantly impact its RC5-64 performance?

 Probably not.  Out of order execution gives you better performance
with code that isn't perfectly tuned, and gives you more flexibility
when tuning.  For something like RC5, it's probably still possible to
keep all the (applicable) execution units running almost all the time. 

 Intel's P5 core was a superscalar in-order execution design.  (U pipe
and V pipe...)  The RC5 core optimized for it kept both pipes full,
AFAIK.

> Would any other aspects of its design affect it?

 How many instructions per clock it can issue (how many pipes there
are) is important, as well as the latency and throughput of the important
instructions like rotate, and MMX operations.

-- 
#define X(x,y) x##y
Peter Cordes ;  e-mail: X(peter at llama.nslug. , ns.ca)

"The gods confound the man who first found out how to distinguish the hours!
 Confound him, too, who in this place set up a sundial, to cut and hack
 my day so wretchedly into small pieces!" -- Plautus, 200 BCE
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