[RC5] P4 Speed Question

Neel Kumar nkumar at dna.com
Fri Jun 15 13:07:48 EDT 2001

Hi Kevin,
	My friends were having a lively debate on whether
C# is a good idea or bad idea.  I could not add anything to
it because I haven't had a chance to look into it.  Could you
let me know more about the idea of C# (as you see it)?

-----Original Message-----
From: Kevin O'Gorman [mailto:kogorman at pacbell.net]
Sent: Thursday, June 14, 2001 9:32 AM
To: rc5 at lists.distributed.net
Subject: Re: [RC5] P4 Speed Question

Appropos of the P4 speed question, I got a call out of the blue today,
from a guy saying he was a recruiter for Microsoft and Intel (they recruit
jointly??? news to me!).  They're having trouble with the compiler
optimization for P4 it seems (Intel's concern) and MS is coming out with
a language called C# (C-sharp) which is supposed to be their answer to
Java.  They both need help from folks with compiler smarts.  To hear this
guy tell it, they're looking to hire _lots_ of help.

I'm not available until I finish this bloody PhD, but I found this
interesting, and worth passing on insofar as it reflects on the likelihood
of things happening quickly to your local friendly neighborhood compiler.
My guess is that this means that optimizing for the P4 is somewhat harder
than Intel had supposed.  And that there's competition for the relevant
talent.  I'm glad I found this out; I was about to go shopping for a 
server, and I'm now really likely to stay with a dual Celeron-A.  Or maybe
P-III.  But the P4 can definitely wait.

There's a whole lot more I would say about the idea of C#, but it's not
relevant here, and I'll spare you.

++ kevin

Ryan Malayter wrote:
> www.news.com reports a forthcoming DDR chipset from Intel for the P4, code
> named "Brookdale," Expected "early next year."
> But as you say, so the f*ck what... P4 performance sucks with P3-optimized
> code. But the P4 isn't all that bad of a CPU core... it's just a bad
> for the current Windows software market.
> The SPEC CPU2000 bechmarks, which are designed to resist hand-tuning, but
> allow for compiler instruction-order optimizations, show us some of the P4
> core's potential. (I know that there are still loopholes in SPEC's hand-
> feedback- optimization rules. Manufacturers can exploit these to a degree,
> but CPU2000 is much stricter than CPU95 in this regard, and a new enough
> benchmark that Intel/AMD probably haven't had time to really juice up
> compilers with CPU2000-specific optimizations. In any case, benchmarks
> SPEC are really the only way to compare two different CPU architectures
> equitably).
>                                                 Cint200 Cfp2000
> Athalon 1.4/PC2100 DDR SDRAM            554             458
> Intel P4 1.4 Ghz/PC800 RDRAM            529             538
> As you can see, the P4 core fares well running P4-optimized code
> clock-for-clock with the Athalon. (AMD chose to use Intel's p3-optimized
> compilers, Intel used the same compiler with P4 flags set). These
> were submitted by AMD and Intel themselves to SPEC, so you can bet they
> represent the best both companies could muster for their platforms.
> Still, since most binary code today is P3-optimized, and the Athalon is
> designed for this code base, that's what I'd buy next week. But if/when MS
> and other vendors start optimizing instruction order for the P4, you're
> going to see the Athalon's current application-level speed advantage
> disappear. Intel is still, after all, the bully in the market, and they're
> going to make P4 optimization pretty cheap and for most x86 shrink-wrap
> developers.
> Somewhat ironically, it's the Linux folks - who can recompile most of
> software to their liking - that might find they actually like performance
> (maybe not price) of the P4 right now. Assuming, of course, that these
> folks have access to good P4-optimized compilers and script
>         -ryan-
> -----Original Message-----
> From: Andrzej Hamka³o [mailto:niktu at dcc.pl]
> Sent: Wednesday, June 13, 2001 12:00 PM
> To: rc5 at lists.distributed.net
> Subject: RE: [RC5] P4 Speed Question
> > It is, the nForce chipset from nvidia introduces dual DDR sdram banks
> > a combined bandwidth of more then the dual channel rdram that intel is
> > pushing for the p4 and with much lower latency.
> >
> > On Wed, 13 Jun 2001, dan the person wrote:
> >
> > > Peter Cordes wrote:
> > >
> > > > On Tue, Jun 12, 2001 at 12:31:49AM +1200, dan the person wrote:
> > > > > Only thing super about a p4 is it's super high price.
> > > >
> > > >  In their defence, they do have more memory bandwidth than
> > > > any other PC
> > > > hardware, with dual rambus channels feeding a 400MHz bus.
> > > >
> > >
> > > Is this not more a feature of the motherboard chipset than the
> > CPU design?
> Well, time to spam out of list subject a bit ....
> Processor-memory bandwith depends on motherboard (chipset, type of ram)
> or processor (type of processor bus)
> - every time you get LOWER value of both, slower componnent chokes other
> (extra ram bandwith could be used ie. by graphic pocessor, or in propely
> designed
> dual system - Intel designs do not apply, there all procs share same bus
> ...)
> Latencies (of memory, chipset and proccesor bus are additive - and
> bigger latency is bad, FYI ;)
> and now short look back:
> <SLB>
> RDRAM (big latency, big bandwith) +
> first incarnation Pentium III (100Mhz single pumed bus - rather slooow,
> even newer 133 version don't catch up even close with RDRAM)
> =
> what you get?
> you right!, weak points of both (big latency, low bandwith system)
> - but you are proud owner of most expensive system in shop :))))))
> - congrats to INTEL for that ingenious idea
> </SLB>
> and now present:
> best of best list:
> DDR RAM - highest badwith, lowest latency, sane price
> nForce chipset - make that bandwith twice :), one but:
> you can use it up for bulitin geforce MX ...
> P4 100*4 bus - nice thingie, but besides bus there are other thingie
> in processor to watch not to screw up ...
> AMD's fastest Proc bus is 133*2
> (if only AMD would launch 266*2 procs :)
> For accuracy: I know, width of bus are important too (took that under
> consideration, thats why i won't say that RDRAM's  are fastest :)
> <rant>
> But Mhz are THE MOST IMPORTANT, right?
> Then people buy 1,7GHz P4 system and are suprised ...
> I bet, the same money could buy you dual Athlon DDR system ...
> (if not 1,4Ghz kind, certainly 1,33, but considering prices of RDRAM,
> and i850 motherboard i think you could even save on dual 1,4Ghz  :)
> you would be suprised, this time rather positively ...
> Most people don't get it that even single 1,4Ghz Athlon performs better
> 1,7GHz P4 ...
> especially on code unoptimized for P4 (currently? - about 98%)
> Then, most programs that ARE optimized for P4, (or for some strange
> run better :) can take advantage of second processor (2 in price of 1,
> remember?)
> I will not compare cow speed on these systems ... (quick guess: 4:1 in
> AMD,
> somebodybdy check that and precise it out), because rarely somebody buys
> system only to run dnetc.
> I can't think of application that would justify P4 existance in current
> ...
>       ... then again you could run Quake III under win ME  :)))  (scratch
> one Athlon :))))
> Now you know why Intel launched 1,3GHz cheepo P4. If somebody wants
> develop and optimize his apps for P4, you can't force poor guy to waste
> much
> money :)
> </rant>
> Always wanted to write that:
> Dear Intel, please make good motherboard chipset at last (DDR?, hoping),
> Via won't have good
> concurency, they won't improve their chipsets as much... (that nasty
> thing ...)
> BX owner
> PS. I didn't bored you to death?, did you really read all of this?, wow :)
> PPS. excuse my keyboard, it sometimes can't spell propely ;) and
> excuse me for being blunt, just got fed up with today exam, and had to let
> off steam ...
> PPPS. Weird, all my essays always came out shorther than this ...
> --
> To unsubscribe, send 'unsubscribe rc5' to majordomo at lists.distributed.net
> rc5-digest subscribers replace rc5 with rc5-digest
> --
> To unsubscribe, send 'unsubscribe rc5' to majordomo at lists.distributed.net
> rc5-digest subscribers replace rc5 with rc5-digest

Kevin O'Gorman  (805) 650-6274  mailto:kevin at kosmanor.com
Permanent e-mail forwarder:  mailto:Kevin.O'Gorman.64 at Alum.Dartmouth.org
At school: mailto:kogorman at cs.ucsb.edu
Web: http://www.cs.ucsb.edu/~kogorman/index.html
Web: http://kosmanor.com/~kevin/index.html

"In theory, there's no difference between theory and practice
    in practice, there nearly always is."
To unsubscribe, send 'unsubscribe rc5' to majordomo at lists.distributed.net
rc5-digest subscribers replace rc5 with rc5-digest
To unsubscribe, send 'unsubscribe rc5' to majordomo at lists.distributed.net
rc5-digest subscribers replace rc5 with rc5-digest

More information about the rc5 mailing list