[RC5] Fw: Mail delivery failed: returning message to sender

John Graves john.graves at nashville.com
Tue Sep 4 18:45:39 EDT 2001


Apparently that email address is bouncing. You received it because they sent
you the bounce instead of (or in addition to) the
owner-rc5 at lists.distributed.net address. You shouldn't have received it.

Of course since you then proceeded to send the bounce message to the list
instead of an administrative address, everyone on the list has gotten to
'enjoy' it.

----- Original Message -----
From: "Enoch" <enojon at ATTGLOBAL.NET>
To: <rc5 at lists.distributed.net>
Sent: Monday, September 03, 2001 7:10 PM
Subject: [RC5] Fw: Mail delivery failed: returning message to sender


> Why am I getting this?
>
> ----- Original Message -----
> From: "Mail Delivery System" <Mailer-Daemon at mail-out.namezero.com>
> To: <enojon at ATTGLOBAL.NET>
> Sent: Monday, September 03, 2001 7:00 PM
> Subject: Mail delivery failed: returning message to sender
>
>
> > This message was created automatically by mail delivery software (Exim).
> >
> > A message that you sent could not be delivered to one or more of its
> > recipients. This is a permanent error. The following address(es) failed:
> >
> >   janebrink at usa.net
> >     SMTP error from remote mailer after RCPT TO:<janebrink at usa.net>:
> >     host mxpool01.netaddress.usa.net [204.68.23.103]:
> >     550 <janebrink at usa.net>... User has cancelled account
> >
> > ------ This is a copy of the message, including all the headers. ------
> >
> > Return-path: <enojon at ATTGLOBAL.NET>
> > Received: from copper.backend.namezero.com ([10.0.0.5] helo=copper)
> > by mail-out.namezero.com with esmtp (Exim 3.30 #1)
> > id 15e2hK-0000WK-00
> > for janebrink at usa.net; Mon, 03 Sep 2001 16:00:06 -0700
> > Received: from  (HELO ) (chipsworld.llamas.net/63.77.33.226)
> >   by copper with SMTP; Mon, 3 Sep 2001 16:00:06 -0700 (PDT)
> >   Apparently from: owner-rc5 at lists.distributed.net
> >   On behalf of:
> >   christian at malerbakken.com
> >   webmaster at dempe.com
> > Received: (from majordomo at localhost)
> > by chipsworld.llamas.net (8.11.3/8.11.3) id f83LG5C32119
> > for rc5-outbound; Mon, 3 Sep 2001 17:16:05 -0400
> > Received: from CC207596-A (cc207596-a.dover1.de.home.com [65.1.160.140])
> > by chipsworld.llamas.net (8.11.3/8.11.3) with ESMTP id f83LG3932113
> > for <rc5 at lists.distributed.net>; Mon, 3 Sep 2001 17:16:04 -0400
> > Received: from CC207596A ([65.1.160.140] unverified) by CC207596-A with
Microsoft SMTPSVC(5.0.2195.2966);
> > Mon, 3 Sep 2001 17:13:39 -0400
> > Message-ID: <004f01c134bd$4d8d3e50$6135fea9 at CC207596A>
> > From: "Enoch" <enojon at ATTGLOBAL.NET>
> > To: <rc5 at lists.distributed.net>
> > References: <4.3.1.2.20010829010136.01707868 at pop.tm.net.my>
<20010829202326.D22801 at llama.nslug.ns.ca>
> > Subject: Re: [RC5] VIA C3
> > Date: Mon, 3 Sep 2001 17:13:37 -0400
> > MIME-Version: 1.0
> > Content-Type: text/plain;
> > charset="iso-8859-1"
> > X-Priority: 3
> > X-MSMail-Priority: Normal
> > X-Mailer: Microsoft Outlook Express 6.00.2600.0000
> > X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2600.0000
> > X-OriginalArrivalTime: 03 Sep 2001 21:13:39.0765 (UTC)
FILETIME=[4D8D3E50:01C134BD]
> > Content-Transfer-Encoding: 8bit
> > X-MIME-Autoconverted: from quoted-printable to 8bit by
chipsworld.llamas.net id f83LG4932115
> > Sender: owner-rc5 at lists.distributed.net
> > Precedence: bulk
> > Reply-To: rc5 at lists.distributed.net
> > X-NZ-Hop-Count: 1
> >
> > at 600mhz, the VIA Cx III performs at 50% of the Intel and AMD
equivalent
> > rated chips.
> >
> > It may not be due to ooo exec alone, but VIA C3 lacking equivalent
number of
> > parallel microcode units.  Nevertheless, on microbenching, the core
picked the
> > "SS Ath" for best performance albeit performing at far slower keys/sec
rate.
> >
> > Maybe L2 cache size of the C3?
> >
> > ----- Original Message -----
> > From: "Peter Cordes" <peter at llama.nslug.ns.ca>
> > To: <rc5 at lists.distributed.net>
> > Sent: Wednesday, August 29, 2001 7:23 PM
> > Subject: Re: [RC5] VIA C3
> >
> >
> > > On Wed, Aug 29, 2001 at 01:02:53AM +0800, Jin-Wei Tioh wrote:
> > > > Would the lack of out-of-order execution on the VIA C3 processor
> > > > significantly impact its RC5-64 performance?
> > >
> > >  Probably not.  Out of order execution gives you better performance
> > > with code that isn't perfectly tuned, and gives you more flexibility
> > > when tuning.  For something like RC5, it's probably still possible to
> > > keep all the (applicable) execution units running almost all the time.
> > >
> > >  Intel's P5 core was a superscalar in-order execution design.  (U pipe
> > > and V pipe...)  The RC5 core optimized for it kept both pipes full,
> > > AFAIK.
> > >
> > > > Would any other aspects of its design affect it?
> > >
> > >  How many instructions per clock it can issue (how many pipes there
> > > are) is important, as well as the latency and throughput of the
important
> > > instructions like rotate, and MMX operations.
> > >
> > > --
> > > #define X(x,y) x##y
> > > Peter Cordes ;  e-mail: X(peter at llama.nslug. , ns.ca)
> > >
> > > "The gods confound the man who first found out how to distinguish the
hours!
> > >  Confound him, too, who in this place set up a sundial, to cut and
hack
> > >  my day so wretchedly into small pieces!" -- Plautus, 200 BCE
> > > --
> > > To unsubscribe, send 'unsubscribe rc5' to
majordomo at lists.distributed.net
> > > rc5-digest subscribers replace rc5 with rc5-digest
> > >
> >
> > --
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majordomo at lists.distributed.net
> > rc5-digest subscribers replace rc5 with rc5-digest
> >
>
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>

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