[RC5] Hardware rotate and (OT) OGR Performance on P4 & Athlon

Jonas Maebe jonas.maebe at rug.ac.be
Thu Dec 12 13:59:53 EST 2002

On donderdag, dec 12, 2002, at 13:38 Europe/Brussels, Julian Ruhe wrote:

> on my way to optimize RC5-72 for Athlon I took the first look into 
> RC5-72 and OGR yesterday.
> First of all: The P4 DOES have a hardware rotate ("rotl and rotr", 
> Port1, "Integer Operation"), but it can process only one per cycle and 
> it has the very high latency of 4.

What people meant with "the P4 doesn't have a hardware rotate" is that 
the P4 doesn't have a barrel shifter, unlike earlier Pentiums and 
Athlons. The result is the high latency you noted. Of course it still 
has a rotate instruction, otherwise it wouldn't be 80x86-compatible 


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