[RC5] AMD X86-64 port

Décio Luiz Gazzoni Filho decio at revistapcs.com.br
Mon Apr 28 00:26:55 EDT 2003

Hash: SHA1

Just to clarify things... I did mention in the Slashnet forum that 64-bit 
arithmetic is harmful to RC5 with 32-bit word size (which is the contest 
we're taking part in), because when working in 32 bits, arithmetic modulo 
2^32 is done for free, which isn't true for 64 bit processors -- they need to 
spend additional cycles to reduce computations modulo 2^32. However, the 
Hammer is indeed a very fast processor both in 32- and 64-bit mode, and it's 
actually a bit faster in 32-bit mode (since IIRC the default is 32-bit 
instructions even in the new ``long mode'', and 64-bit instructions require 
an instruction prefix, which enlarges the code), unlike the Itanium.

So all of Hammer's additional performance is coming from the added registers 
and the few changes from the Athlon's microarchitecture, and none from it's 


On Sunday 27 April 2003 17:48, Richard Menedetter wrote:
> Hi Scott!
> 27 Apr 2003, Scott Dodson <sdodson at eagle4.cc.gasou.edu> wrote:
>  >> I'm most interested to see what those extra registers in 64-bit mode
>  >> can do for RC5-72 performance.
>  SD> Acidblood has said that the simple fact of being 64-bit won't help,
> The Athlon64/Opteron has 16 general purpose registers in 64 bit mode.
> This is twice as much as a "conventional" x86 CPU.
> Those 16 Registers can be addressed as 32 or 64 bit registers.
>  SD> and I think he even said it would harm it.
> Than you can use the Registers as 32 bit registers.
> The fact that the amount has doubled should help.
>  SD> But of course, if the new Opteron is overall a faster processor, it
>  SD> should surely go faster.  The fact that it runs 32bit code pretty well
>  SD> should be interesting too.
> Opteron/Athlon64 is an athlon on sterroids.
> It runs 32 bit code natively (and faster than an athlon)
> and it can use 32 bit registers in 64 bit mode.
> It should be pretty interesting to see how it will perform.
>  SD> Scott
> CU, Ricsi
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