[RC5] PowerBook Alu performance

Décio Luiz Gazzoni Filho decio at revistapcs.com.br
Thu Oct 2 22:38:14 EDT 2003


-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

The PPC architecture has a vector (SIMD) extension called Altivec, which is 
particularly well suited for RC5. There are 32, 128-bit wide registers, and 
most importantly, a bit rotate instruction, which is the heart of the RC5 
algorithm. Also, being lower clocked processors, they can perform work with 
less latency in clock cycles, compared to (say) the P4. So basically, a G4 
core can do a full loop iteration (4 cycles for that core) in less time than 
an Athlon can do its own loop iteration (which only computes 2 keys), so 
that's more than twice the rate while processing twice as many keys per 
iteration.

Newer x86 processors have their own extensions, like MMX and SSE2, but the 
lack of bit rotate instructions on them outweigh the benefits of parallel 
processing. However, some people have had luck with mixed scalar/vector code 
recently, as you can witness by the discussions on this list.

Décio 

On Thursday 02 October 2003 21:44, chandler sobel-sörenson wrote:
> why are the powerpc rates so much faster than the other?
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.2.3 (GNU/Linux)

iD8DBQE/fOEWce3VljctsGsRArOoAJkBkAZiU9fot6+0YFVblrJHfvXfXgCcCZ1y
rr5fcgaht0T7WwbZG0MbePo=
=4EgL
-----END PGP SIGNATURE-----



More information about the rc5 mailing list