[RC5] Runtime optimization??

Décio Luiz Gazzoni Filho decio at decpp.net
Fri Mar 3 05:29:53 EST 2006

On Mar 3, 2006, at 4:19 AM, Thorsten Wolf wrote:

> So with Dual Core now available, Quad Core to be introduced by INTC  
> 2007, I
> think that a coding improvement of 6% won't do much. Maybe Intel Corp
> decides to put that instruction back into the cpu or extra  
> instruction come
> with next generation CPU's... Dnetc speed can vastly improve over  
> today's
> performance. Which is great if you ask me, but that's just my 2  
> cents here.

The latest P4 cores, codenamed `Prescott', already have barrel  
shifters and hence execute rotates in 1 cycle. However other  
instructions were slowed down and the gain wasn't as huge as it could  
have been. There is though a clear difference from the newest P4s to  
the previous models.

But this isn't very relevant to the future performance of Intel  
processors, since Intel is dropping the Pentium 4 microarchitecture  
in favor of a Pentium M derivative.

Also, dual or quad core processors will be considered minor  
improvements once the Playstation 3 hits the scene.


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