[RC5] [Announcement] Beta client for the PlayStation 3

Décio Luiz Gazzoni Filho decio at decpp.net
Fri Aug 17 21:55:04 EDT 2007

Le 15 août 07 à 03:41, david fleischer a écrit :

> No kidding! Let's see how much ground it starts to accumulate in the
> overall stats. I was wondering about the code architecture, since the
> SPE are floating point processors, apparently. How does this fit in w/
> the RC5 computations? Can you give a little bit more details?


The SPEs can do integer arithmetic in addition to floating-point.  
Their instruction set is basically Altivec, give or take something,  
the main difference being that there are 128 registers rather than  
32. So this is why we can achieve rates similar to those achievable  
in G4s and G5s with Altivec. PowerPC cores are a little bit faster  
because in addition to Altivec (128-bit) they also do some work in  
the scalar (32-bit) registers, achieving a speedup of about 32/128 =  
25%, give or take. The SPEs don't have scalar registers at all so  
this trick isn't valid there. It could in theory be done in the PS3's  
PPE, since it is a PowerPC processor with Altivec, and in that case  
the PPE core should be faster than the SPE core. Unfortunately scalar  
rotates in the PPE are microcoded and take too long (11 cycles).  
Kinda like the problem the Pentium 4s had with slow rotates. Maybe  
_some_ gain is achievable (to pull a figure out of my ass, ~5%) but I  
don't think it's worth the effort. Of course if someone wants to  
prove me wrong, go ahead (:

I hope that answers your question. If not, let me know and I'll go  
into more detail.


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